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International Journal of Scientific & Technology Research

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IJSTR >> Volume 9 - Issue 3, March 2020 Edition



International Journal of Scientific & Technology Research  
International Journal of Scientific & Technology Research

Website: http://www.ijstr.org

ISSN 2277-8616



Investigationon Analysis Of Power Efficent 15/16 Prescaler

[Full Text]

 

AUTHOR(S)

Mr.Sakthimani S, Dr.Kalaiarasan R

 

KEYWORDS

Dflip-flops, True Single Phase Clock Prescalers, Low Power 3/4 Dual Modulus prescalers,15/16 Dual Modulus prescaler & Twin prescaler.

 

ABSTRACT

Prescaler could classified to a hard and fast quantitative relation or lot of flexibility, could afford classified to one among 2 offered classified ratio. Twin prescaler of a modulus may be a classifier whose division quantitative relation OR modulus may be switched from 1 worth to a different through a bearing available signal. The twin prescaler of a modulus includes a mode management that permits a bearing circuit to line a primary mode wherever divides the prescaler through a primary classified quantitative relation or fix the 2nd mode wherever the prescaler classified through the 2nd classified quantitative relation. Many/more prescaler modulus are 1 within which classification quantitative relation may be switched in the middle of a many division ratios through Associate in Nursing outside management signal to increase a higher frequency synthesizer of the range however till enable lower frequencies of the synthesis Prescaler could be a parallel circuit that is created by using D flip-flops and extra basic logic gates. For that reason, incorporation of the further logic gates b/w the FF's to realize the 2 completely different classified ratios the prescaler speed is damaged and also the switch energy will increase. Numerous FF's are planned to boost the operational of the dual modulus prescaler speed. Optimisation of the D FF within the parallel position is important to extend the operational frequency & power consumption is reduced

 

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